Recently, a phase change memory using a chalcogenide material as a recording material has been actively researched as a nonvolatile memory device. The phase change memory is a kind of a resistance change memory that stores information using different resistance states of a recording material between electrodes.
In the phase change memory, information is stored using a fact that a resistance value of a phase change material, such as Ge2Sb2Te5, is different between an amorphous state and a crystalline state. The resistance is high in the amorphous state (high resistance state) and the resistance is low in the crystalline state (low resistance state). Accordingly, reading of information from the phase change memory is implemented by applying a potential difference to both ends of an element, measuring a current flowing in the element, and discriminating a high resistance state or a low resistance state of the element.
In the phase change memory, data is rewritten by changing electric resistance of a phase change film, made of a phase change material, into a different state using Joule heat generated by current.
FIG. 19 is a graph illustrating a relationship between a pulse width and temperature necessary for a phase change of a resistive storage element using a phase change material. In this drawing, a vertical axis indicates temperature and a horizontal axis indicates time. In the case of writing storage information “0” into this storage element, a reset pulse with which the storage element is heated to temperature equal to or higher than a melting point Ta of a chalcogenide material by causing a large current to flow therein and cooled rapidly is applied as illustrated in FIG. 19. When a cooling time t1 is reduced (for example, set to about 1 ns) in this case, the chalcogenide material becomes a high-resistance amorphous (amorphous) state. On the other hand, in the case of writing storage information “1,” a set pulse is applied for a long period in such a manner that a current sufficient for keeping the storage element in a temperature region that is lower than the melting point Ta and higher than a crystallization temperature Tx (equal to or higher than a glass transition point) flows. Accordingly, the chalcogenide material becomes a low-resistance polycrystalline state.
When a resistance element structure is made small in this phase change memory, a current necessary for a change of a state of a phase-change film is decreased. Thus, the phase-change memory is suitable for downsizing, in principle, and has been actively researched. PTL's 1, 2 and 3 disclose a nonvolatile memory having a three-dimensional structure.
PTL's 1 and 3 disclose a configuration in which memory cells each of which includes a variable resistance element and a transistor connected thereto in parallel are connected in series in a stacked direction. In addition, PTL 2 discloses a configuration in which memory cells each of which includes a variable resistance element and a diode connected thereto in series are connected in series in a stacked direction with a conductive line interposed therebetween. In this configuration, for example, a batch writing operation is performed with respect to two memory cells by applying a potential difference to a conductive line between the two memory cells and two conductive lines on an outer side of the two memory cells.
In addition, PTL 3 discloses a method of collectively erasing data stored in an array of N×M memory cells having a three-dimensional structure. Further, it is disclosed that a thermal buffer area is provided such that the Joule heat in an erase operation does not give a great influence to a crystalline state of peripheral memory cells, adjacent to a memory cell array as an erase target. In addition, PTL 4 relates to a nonvolatile memory and discloses that a controller selects one of memory units in response to a workload indicator.